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authorTony Luck <tony.luck@intel.com>2006-03-21 17:21:26 +0100
committerTony Luck <tony.luck@intel.com>2006-03-21 17:21:26 +0100
commit409761bb6a06bd61e2d8e27a1af534371d9537ed (patch)
tree2c07068558092a01d70f737de9b9a34212a44d4b /include/asm-ia64/processor.h
parentPull altix-ce1.0-asic into release branch (diff)
parent[IA64] hooks to wait for mmio writes to drain when migrating processes (diff)
downloadlinux-409761bb6a06bd61e2d8e27a1af534371d9537ed.tar.xz
linux-409761bb6a06bd61e2d8e27a1af534371d9537ed.zip
Pull sn2-mmio-writes into release branch
Hand-fixed conflicts: include/asm-ia64/machvec_sn2.h Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64/processor.h')
-rw-r--r--include/asm-ia64/processor.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 23c8e1be1911..128fefd8056f 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -50,7 +50,8 @@
#define IA64_THREAD_PM_VALID (__IA64_UL(1) << 2) /* performance registers valid? */
#define IA64_THREAD_UAC_NOPRINT (__IA64_UL(1) << 3) /* don't log unaligned accesses */
#define IA64_THREAD_UAC_SIGBUS (__IA64_UL(1) << 4) /* generate SIGBUS on unaligned acc. */
- /* bit 5 is currently unused */
+#define IA64_THREAD_MIGRATION (__IA64_UL(1) << 5) /* require migration
+ sync at ctx sw */
#define IA64_THREAD_FPEMU_NOPRINT (__IA64_UL(1) << 6) /* don't log any fpswa faults */
#define IA64_THREAD_FPEMU_SIGFPE (__IA64_UL(1) << 7) /* send a SIGFPE for fpswa faults */