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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-12-21 05:39:22 +0100
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-12-23 20:12:11 +0100
commit0e6140a56f2878816ecf9db50f40133d25d987e4 (patch)
tree672b1af7086bcb712839756fb31f6d662525ab54 /include/asm-m68knommu/mmu.h
parent[POWERPC] Reworking machine check handling and Fix 440/440A (diff)
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[POWERPC] 4xx: Improve support for 4xx indirect DCRs
Accessing indirect DCRs is done via a pair of address/data DCRs. Such accesses are thus inherently racy, vs. interrupts, preemption and possibly SMP if 4xx SMP cores are ever used. This updates the mfdcri/mtdcri macros in dcr-native.h (which were so far unused) to use a spinlock. In addition, add some common definitions to a new dcr-regs.h file. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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