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authorSebastian Siewior <bigeasy@linutronix.de>2008-04-28 11:43:17 +0200
committerGreg Ungerer <gerg@uclinux.org>2008-07-23 07:11:29 +0200
commitc1863bed8c88324405dc2a922c153fe5d7df716c (patch)
treebf061373bdba0e9e4ab79357b101d2dd60d7aa75 /include/asm-m68knommu
parentm68knommu: fec: remove FADS (diff)
downloadlinux-c1863bed8c88324405dc2a922c153fe5d7df716c.tar.xz
linux-c1863bed8c88324405dc2a922c153fe5d7df716c.zip
m68knommu: remove RPXCLASSIC from the m68k tree
This ifdefs are leftovers from the time as the driver was running on a ppc. Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'include/asm-m68knommu')
-rw-r--r--include/asm-m68knommu/commproc.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/include/asm-m68knommu/commproc.h b/include/asm-m68knommu/commproc.h
index 36e870b468ef..edf5eb6c08d2 100644
--- a/include/asm-m68knommu/commproc.h
+++ b/include/asm-m68knommu/commproc.h
@@ -519,25 +519,6 @@ typedef struct scc_enet {
#define SICR_ENET_CLKRT ((uint)0x00002c00)
#endif
-#ifdef CONFIG_RPXCLASSIC
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- */
-#define PA_ENET_RXD ((ushort)0x0001)
-#define PA_ENET_TXD ((ushort)0x0002)
-#define PA_ENET_TCLK ((ushort)0x0200)
-#define PA_ENET_RCLK ((ushort)0x0800)
-#define PB_ENET_TENA ((uint)0x00001000)
-#define PC_ENET_CLSN ((ushort)0x0010)
-#define PC_ENET_RENA ((ushort)0x0020)
-
-/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
- * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x000000ff)
-#define SICR_ENET_CLKRT ((uint)0x0000003d)
-#endif
-
/* SCC Event register as used by Ethernet.
*/
#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */