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authorTrond Myklebust <Trond.Myklebust@netapp.com>2006-06-21 02:46:21 +0200
committerTrond Myklebust <Trond.Myklebust@netapp.com>2006-06-21 02:46:21 +0200
commit70ac4385a13f78bc478f26d317511893741b05bd (patch)
treedafc7f3018295fc4ee00339889e4f35d5b9d7743 /include/asm-mips/bcache.h
parentMerge branch 'master' of /home/trondmy/kernel/linux-2.6/ (diff)
parentMerge branch 'rio.b19' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/... (diff)
downloadlinux-70ac4385a13f78bc478f26d317511893741b05bd.tar.xz
linux-70ac4385a13f78bc478f26d317511893741b05bd.zip
Merge branch 'master' of /home/trondmy/kernel/linux-2.6/
Conflicts: include/linux/nfs_fs.h Fixed up conflict with kernel header updates.
Diffstat (limited to 'include/asm-mips/bcache.h')
-rw-r--r--include/asm-mips/bcache.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/include/asm-mips/bcache.h b/include/asm-mips/bcache.h
index 446102b34f4e..3646a3f2ed38 100644
--- a/include/asm-mips/bcache.h
+++ b/include/asm-mips/bcache.h
@@ -9,7 +9,6 @@
#ifndef _ASM_BCACHE_H
#define _ASM_BCACHE_H
-#include <linux/config.h>
/* Some R4000 / R4400 / R4600 / R5000 machines may have a non-dma-coherent,
chipset implemented caches. On machines with other CPUs the CPU does the