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authorRalf Baechle <ralf@linux-mips.org>2006-07-06 14:04:01 +0200
committerRalf Baechle <ralf@linux-mips.org>2006-07-13 22:26:04 +0200
commitfc5d2d279ff820172a698706d33e733d4578bd6c (patch)
tree1b376605e1870af29a49272d85cb589d319e058b /include/asm-mips/cpu-features.h
parent[MIPS] IP22: Remove SYS_SUPPORTS_SMP test code. (diff)
downloadlinux-fc5d2d279ff820172a698706d33e733d4578bd6c.tar.xz
linux-fc5d2d279ff820172a698706d33e733d4578bd6c.zip
[MIPS] Use the proper technical term for naming some of the cache macros.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu-features.h')
-rw-r--r--include/asm-mips/cpu-features.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 3c2fc2b647c8..eadca266f159 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -195,8 +195,8 @@
# define cpu_has_veic 0
#endif
-#ifndef cpu_has_subset_pcaches
-#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
+#ifndef cpu_has_inclusive_pcaches
+#define cpu_has_inclusive_pcaches (cpu_data[0].options & MIPS_CPU_INCLUSIVE_CACHES)
#endif
#ifndef cpu_dcache_line_size