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| author | Jeff Garzik <jeff@garzik.org> | 2006-04-20 23:27:45 +0200 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2006-04-20 23:27:45 +0200 |
| commit | 9707b27100a48950f1e15e08a7c5028786e47f55 (patch) | |
| tree | 5745b1e7497ae1499a2e2e9e0a567996419ab34f /include/asm-mips/cpu-info.h | |
| parent | Merge branch '7.0.38-k2' of git://66.93.40.222/srv/git/netdev-2.6 (diff) | |
| parent | Merge branch 'for-linus' of git://brick.kernel.dk/data/git/linux-2.6-block (diff) | |
| download | linux-9707b27100a48950f1e15e08a7c5028786e47f55.tar.xz linux-9707b27100a48950f1e15e08a7c5028786e47f55.zip | |
Merge branch 'master'
Diffstat (limited to 'include/asm-mips/cpu-info.h')
| -rw-r--r-- | include/asm-mips/cpu-info.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index 140be1c67da7..6572ac703662 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h @@ -73,6 +73,16 @@ struct cpuinfo_mips { struct cache_desc dcache; /* Primary D or combined I/D cache */ struct cache_desc scache; /* Secondary cache */ struct cache_desc tcache; /* Tertiary/split secondary cache */ +#if defined(CONFIG_MIPS_MT_SMTC) + /* + * In the MIPS MT "SMTC" model, each TC is considered + * to be a "CPU" for the purposes of scheduling, but + * exception resources, ASID spaces, etc, are common + * to all TCs within the same VPE. + */ + int vpe_id; /* Virtual Processor number */ + int tc_id; /* Thread Context number */ +#endif /* CONFIG_MIPS_MT */ void *data; /* Additional data */ } __attribute__((aligned(SMP_CACHE_BYTES))); |