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| author | Ingo Molnar <mingo@elte.hu> | 2008-06-23 10:52:59 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-06-23 10:52:59 +0200 |
| commit | a60b33cf59d1c9e0e363287fce799cb23d45660c (patch) | |
| tree | 85eb8feea5717cf472a2549e53f59183a95617c5 /include/asm-mips/cpu-info.h | |
| parent | softirq: remove irqs_disabled warning from local_bh_enable (diff) | |
| parent | Slab: Fix memory leak in fallback_alloc() (diff) | |
| download | linux-a60b33cf59d1c9e0e363287fce799cb23d45660c.tar.xz linux-a60b33cf59d1c9e0e363287fce799cb23d45660c.zip | |
Merge branch 'linus' into core/softirq
Diffstat (limited to 'include/asm-mips/cpu-info.h')
| -rw-r--r-- | include/asm-mips/cpu-info.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index 0c5a358863f3..2de73dbb2e9e 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h @@ -56,7 +56,7 @@ struct cpuinfo_mips { struct cache_desc tcache; /* Tertiary/split secondary cache */ int srsets; /* Shadow register sets */ int core; /* physical core number */ -#if defined(CONFIG_MIPS_MT_SMTC) +#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) /* * In the MIPS MT "SMTC" model, each TC is considered * to be a "CPU" for the purposes of scheduling, but @@ -64,7 +64,7 @@ struct cpuinfo_mips { * to all TCs within the same VPE. */ int vpe_id; /* Virtual Processor number */ -#endif /* CONFIG_MIPS_MT */ +#endif #ifdef CONFIG_MIPS_MT_SMTC int tc_id; /* Thread Context number */ #endif |