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author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:05 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:05 +0200 |
commit | cc6e8e0812cf95aea397c457ff48de2ac069614f (patch) | |
tree | da0527908dceed57cd10204034a6b2c888a34863 /include/asm-mips/cpu-info.h | |
parent | [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. (diff) | |
download | linux-cc6e8e0812cf95aea397c457ff48de2ac069614f.tar.xz linux-cc6e8e0812cf95aea397c457ff48de2ac069614f.zip |
[MIPS] Remove IP27 specific structures from struct cpuinfo_mips
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu-info.h')
-rw-r--r-- | include/asm-mips/cpu-info.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index 22fe8453fcc7..04689590eeed 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h @@ -14,10 +14,6 @@ #include <asm/cache.h> -#ifdef CONFIG_SGI_IP27 -#include <asm/sn/types.h> -#endif - /* * Descriptor for a cache */ @@ -43,20 +39,6 @@ struct cache_desc { struct cpuinfo_mips { unsigned long udelay_val; unsigned long asid_cache; -#if defined(CONFIG_SGI_IP27) -// cpuid_t p_cpuid; /* PROM assigned cpuid */ - cnodeid_t p_nodeid; /* my node ID in compact-id-space */ - nasid_t p_nasid; /* my node ID in numa-as-id-space */ - unsigned char p_slice; /* Physical position on node board */ -#endif -#if 0 - unsigned long loops_per_sec; - unsigned long ipi_count; - unsigned long irq_attempt[NR_IRQS]; - unsigned long smp_local_irq_count; - unsigned long prof_multiplier; - unsigned long prof_counter; -#endif /* * Capability and feature descriptor structure for MIPS CPU |