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| author | Chris Dearman <chris@mips.com> | 2007-05-08 17:09:13 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-05-11 15:28:31 +0200 |
| commit | 0b6249567b4ecf6e9d5a8efcf149f3e7cf788cc0 (patch) | |
| tree | dfb8d45357a9e8e3ad134f7eec87e7918132410e /include/asm-mips/hazards.h | |
| parent | [MIPS] MT: Reenable EIC support and add support for SOCit SC. (diff) | |
| download | linux-0b6249567b4ecf6e9d5a8efcf149f3e7cf788cc0.tar.xz linux-0b6249567b4ecf6e9d5a8efcf149f3e7cf788cc0.zip | |
[MIPS] FPU hazard handling
Move FPU hazard handling to hazards.h and provide proper support for
MIPSR2 processors
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/hazards.h')
| -rw-r--r-- | include/asm-mips/hazards.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index e50c77e69cb5..1542f23ab9d9 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -178,4 +178,36 @@ ASMMACRO(back_to_back_c0_hazard, #endif + +/* FPU hazards */ + +#if defined(CONFIG_CPU_SB1) +ASMMACRO(enable_fpu_hazard, + .set push; + .set mips64; + .set noreorder; + _ssnop; + bnezl $0,.+4; + _ssnop + .set pop +) +ASMMACRO(disable_fpu_hazard, +) + +#elif defined(CONFIG_CPU_MIPSR2) +ASMMACRO(enable_fpu_hazard, + _ehb +) +ASMMACRO(disable_fpu_hazard, + _ehb +) +#else +ASMMACRO(enable_fpu_hazard, + nop; nop; nop; nop +) +ASMMACRO(disable_fpu_hazard, + _ehb +) +#endif + #endif /* _ASM_HAZARDS_H */ |