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| author | Len Brown <len.brown@intel.com> | 2005-12-06 23:31:30 +0100 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2005-12-06 23:31:30 +0100 |
| commit | 3d5271f9883cba7b54762bc4fe027d4172f06db7 (patch) | |
| tree | ab8a881a14478598a0c8bda0d26c62cdccfffd6d /include/asm-mips/mach-ip22 | |
| parent | [ACPI] 8250_acpi.c buildfix (diff) | |
| parent | Auto-update from upstream (diff) | |
| download | linux-3d5271f9883cba7b54762bc4fe027d4172f06db7.tar.xz linux-3d5271f9883cba7b54762bc4fe027d4172f06db7.zip | |
Pull release into acpica branch
Diffstat (limited to 'include/asm-mips/mach-ip22')
| -rw-r--r-- | include/asm-mips/mach-ip22/cpu-feature-overrides.h | 8 | ||||
| -rw-r--r-- | include/asm-mips/mach-ip22/spaces.h | 2 |
2 files changed, 9 insertions, 1 deletions
diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h index 3c8896d9b133..ab9714668177 100644 --- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h @@ -11,6 +11,12 @@ /* * IP22 with a variety of processors so we can't use defaults for everything. */ +#define cpu_has_tlb 1 +#define cpu_has_4kex 1 +#define cpu_has_4kcache 1 +#define cpu_has_fpu 1 +#define cpu_has_32fpr 1 +#define cpu_has_counter 1 #define cpu_has_mips16 0 #define cpu_has_divec 0 #define cpu_has_cache_cdex_p 1 @@ -23,6 +29,8 @@ #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 + #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h index e96166f27c49..8385f716798d 100644 --- a/include/asm-mips/mach-ip22/spaces.h +++ b/include/asm-mips/mach-ip22/spaces.h @@ -44,7 +44,7 @@ #define CAC_BASE 0xffffffff80000000 #define IO_BASE 0xffffffffa0000000 #define UNCAC_BASE 0xffffffffa0000000 -#define MAP_BASE 0xffffffffc0000000 +#define MAP_BASE 0xc000000000000000 #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) |