summaryrefslogtreecommitdiffstats
path: root/include/asm-mips/mach-pb1x00
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2007-10-17 16:38:30 +0200
committerRalf Baechle <ralf@linux-mips.org>2007-10-17 19:28:48 +0200
commit9d360ab4a7568a8d177280f651a8a772ae52b9b9 (patch)
tree39a7d2791d3ed0fd5b3369064265834e6397ecf2 /include/asm-mips/mach-pb1x00
parent[MIPS] Alchemy: replace last remaining instance of au_ffs with ffs. (diff)
downloadlinux-9d360ab4a7568a8d177280f651a8a772ae52b9b9.tar.xz
linux-9d360ab4a7568a8d177280f651a8a772ae52b9b9.zip
[MIPS] Alchemy: Renumber interrupts so irq_cpu can work.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-pb1x00')
-rw-r--r--include/asm-mips/mach-pb1x00/pb1200.h52
1 files changed, 28 insertions, 24 deletions
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index 409d443322c1..d9f384acfea9 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -217,31 +217,35 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
/*
- * External Interrupts for Pb1200 as of 8/6/2004.
- * Bit positions in the CPLD registers can be calculated by taking
- * the interrupt define and subtracting the PB1200_INT_BEGIN value.
- * *example: IDE bis pos is = 64 - 64
- ETH bit pos is = 65 - 64
+ * External Interrupts for Pb1200 as of 8/6/2004.
+ * Bit positions in the CPLD registers can be calculated by taking
+ * the interrupt define and subtracting the PB1200_INT_BEGIN value.
+ *
+ * Example: IDE bis pos is = 64 - 64
+ * ETH bit pos is = 65 - 64
*/
-#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
-#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
-#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
-#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
-#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
-#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
-#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
-#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
-#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
-#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
-#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
-#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
-#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
-#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
-#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
-#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
-#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
-
-#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
+enum external_pb1200_ints {
+ PB1200_INT_BEGIN = AU1000_MAX_INTR + 1,
+
+ PB1200_IDE_INT = PB1200_INT_BEGIN,
+ PB1200_ETH_INT,
+ PB1200_PC0_INT,
+ PB1200_PC0_STSCHG_INT,
+ PB1200_PC1_INT,
+ PB1200_PC1_STSCHG_INT,
+ PB1200_DC_INT,
+ PB1200_FLASHBUSY_INT,
+ PB1200_PC0_INSERT_INT,
+ PB1200_PC0_EJECT_INT,
+ PB1200_PC1_INSERT_INT,
+ PB1200_PC1_EJECT_INT,
+ PB1200_SD0_INSERT_INT,
+ PB1200_SD0_EJECT_INT,
+ PB1200_SD1_INSERT_INT,
+ PB1200_SD1_EJECT_INT,
+
+ PB1200_INT_END (PB1200_INT_BEGIN + 15)
+};
/* For drivers/pcmcia/au1000_db1x00.c */
#define BOARD_PC0_INT PB1200_PC0_INT