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author | Ralf Baechle <ralf@linux-mips.org> | 2005-05-31 13:49:19 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 20:31:17 +0200 |
commit | e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f (patch) | |
tree | 1928e8b0a4b7fb615e5a9f65dc934ba2e74cb9cd /include/asm-mips/mach-sibyte | |
parent | 64-bit fixes for Alchemy code ;) (diff) | |
download | linux-e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f.tar.xz linux-e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f.zip |
Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-sibyte')
-rw-r--r-- | include/asm-mips/mach-sibyte/cpu-feature-overrides.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h index a3a2cc6014b2..193a666cd131 100644 --- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h +++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h @@ -25,6 +25,7 @@ #define cpu_has_vtag_icache 1 #define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 +#define cpu_has_dsp 0 #define cpu_icache_snoops_remote_store 0 #define cpu_has_nofpuex 0 |