diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-06-20 23:27:10 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-06-20 23:27:10 +0200 |
| commit | 3b1d4ed5353af04d6aa20be2701727b9cdb2ac61 (patch) | |
| tree | e4a3335c925abd933f1650e1ee4786e6bfad8f35 /include/asm-mips/mips-boards/seadint.h | |
| parent | [POWERPC] rheap - eliminates internal fragments caused by alignment (diff) | |
| download | linux-3b1d4ed5353af04d6aa20be2701727b9cdb2ac61.tar.xz linux-3b1d4ed5353af04d6aa20be2701727b9cdb2ac61.zip | |
[MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict. So that's the one-liner.
The rest is 10 square kilometers of collateral damage fixup this include
used to paper over.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mips-boards/seadint.h')
| -rw-r--r-- | include/asm-mips/mips-boards/seadint.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h index 4f6a3933699d..e710bae07340 100644 --- a/include/asm-mips/mips-boards/seadint.h +++ b/include/asm-mips/mips-boards/seadint.h @@ -22,14 +22,7 @@ #include <irq.h> -/* - * Interrupts 0..7 are used for SEAD CPU interrupts - */ -#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE - #define MIPSCPU_INT_UART0 2 #define MIPSCPU_INT_UART1 3 -#define MIPSCPU_INT_CPUCTR 7 - #endif /* !(_MIPS_SEADINT_H) */ |