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author | Ralf Baechle <ralf@linux-mips.org> | 2006-04-05 10:45:45 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2006-04-19 04:14:27 +0200 |
commit | 2600990e640e3bef29ed89d565864cf16ee83833 (patch) | |
tree | 7c7a43916d509d56ad89b951c485c7d75f40468e /include/asm-mips/mipsmtregs.h | |
parent | [MIPS] R2: Instruction hazard barrier. (diff) | |
download | linux-2600990e640e3bef29ed89d565864cf16ee83833.tar.xz linux-2600990e640e3bef29ed89d565864cf16ee83833.zip |
[MIPS] kpsd and other AP/SP improvements.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mipsmtregs.h')
-rw-r--r-- | include/asm-mips/mipsmtregs.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h index a669c0702c66..a5ac1a62f4f4 100644 --- a/include/asm-mips/mipsmtregs.h +++ b/include/asm-mips/mipsmtregs.h @@ -234,7 +234,7 @@ static inline void __raw_emt(void) __asm__ __volatile__( " .set noreorder \n" " .set mips32r2 \n" - " emt \n" + " .word 0x41600be1 # emt \n" " ehb \n" " .set mips0 \n" " .set reorder"); @@ -364,6 +364,9 @@ do { \ #define read_vpe_c0_ebase() mftc0(15,1) #define write_vpe_c0_ebase(val) mttc0(15, 1, val) #define write_vpe_c0_compare(val) mttc0(11, 0, val) +#define read_vpe_c0_badvaddr() mftc0(8, 0) +#define read_vpe_c0_epc() mftc0(14, 0) +#define write_vpe_c0_epc(val) mttc0(14, 0, val) /* TC */ |