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authorRalf Baechle <ralf@linux-mips.org>2005-07-14 09:34:18 +0200
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 20:31:51 +0200
commit8f40611d2b184ca5d525075d273854929cf8d1d0 (patch)
tree962ef8dfa515cee330f506dc4ceac83670d0f84e /include/asm-mips/mipsregs.h
parentMacros to access the register of processors using the new MIPS (diff)
downloadlinux-8f40611d2b184ca5d525075d273854929cf8d1d0.tar.xz
linux-8f40611d2b184ca5d525075d273854929cf8d1d0.zip
Detect the MIPS R2 vectored interrupt, external interrupt controller
options and the precense of the MT ASE. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mipsregs.h')
-rw-r--r--include/asm-mips/mipsregs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 89aac1e1f348..a7a43ff8c5cf 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -528,6 +528,7 @@
#define MIPS_CONF3_TL (_ULCAST_(1) << 0)
#define MIPS_CONF3_SM (_ULCAST_(1) << 1)
+#define MIPS_CONF3_MT (_ULCAST_(1) << 2)
#define MIPS_CONF3_SP (_ULCAST_(1) << 4)
#define MIPS_CONF3_VINT (_ULCAST_(1) << 5)
#define MIPS_CONF3_VEIC (_ULCAST_(1) << 6)