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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2006-05-27 20:39:39 +0200
committerRalf Baechle <ralf@linux-mips.org>2006-06-06 01:15:18 +0200
commit7cb710c9a617384cd0ed30638f3acc00125690fc (patch)
treeb73e0f3c4c2df044a049e77f4c2146af2b7327b0 /include/asm-mips/pgtable-64.h
parent[MIPS] SB1: Only pass1 FPUs are broken beyond recovery. (diff)
downloadlinux-7cb710c9a617384cd0ed30638f3acc00125690fc.tar.xz
linux-7cb710c9a617384cd0ed30638f3acc00125690fc.zip
[MIPS] Fix non-linear memory mapping on MIPS
Fix the non-linear memory mapping done via remap_file_pages() -- it didn't work on any MIPS CPU because the page offset clashing with _PAGE_FILE and some other page protection bits which should have been left zeros for this kind of pages. Signed-off-by: Konstantin Baydarov <kbaidarov@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to '')
-rw-r--r--include/asm-mips/pgtable-64.h13
1 files changed, 5 insertions, 8 deletions
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index 82166b254b27..2faf5c9ff127 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -224,15 +224,12 @@ static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
/*
- * Bits 0, 1, 2, 7 and 8 are taken, split up the 32 bits of offset
- * into this range:
+ * Bits 0, 4, 6, and 7 are taken. Let's leave bits 1, 2, 3, and 5 alone to
+ * make things easier, and only use the upper 56 bits for the page offset...
*/
-#define PTE_FILE_MAX_BITS 32
+#define PTE_FILE_MAX_BITS 56
-#define pte_to_pgoff(_pte) \
- ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
-
-#define pgoff_to_pte(off) \
- ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
+#define pte_to_pgoff(_pte) ((_pte).pte >> 8)
+#define pgoff_to_pte(off) ((pte_t) { ((off) << 8) | _PAGE_FILE })
#endif /* _ASM_PGTABLE_64_H */