diff options
| author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2006-05-03 20:56:43 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-06-06 01:15:15 +0200 |
| commit | 79e0bc37255a4b934291b4d3ea5a4561fbd78da4 (patch) | |
| tree | 5505705aba14aa4560bbd875f50b5f15f9e18f29 /include/asm-mips/pgtable.h | |
| parent | [MIPS] Save write-only Config.OD from being clobbered (diff) | |
| download | linux-79e0bc37255a4b934291b4d3ea5a4561fbd78da4.tar.xz linux-79e0bc37255a4b934291b4d3ea5a4561fbd78da4.zip | |
[MIPS] Fix mprotect() syscall for MIPS32 w/36-bit physical address support
Fix mprotect() syscall for MIPS32 CPUs with 36-bit physical address
support: pte_modify() macro didn't clear the hardware page protection bits
before modifying...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to '')
| -rw-r--r-- | include/asm-mips/pgtable.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h index f80fe75c7800..d0af2a3b0152 100644 --- a/include/asm-mips/pgtable.h +++ b/include/asm-mips/pgtable.h @@ -353,8 +353,9 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot) #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { - pte.pte_low &= _PAGE_CHG_MASK; - pte.pte_low |= pgprot_val(newprot); + pte.pte_low &= _PAGE_CHG_MASK; + pte.pte_high &= ~0x3f; + pte.pte_low |= pgprot_val(newprot); pte.pte_high |= pgprot_val(newprot) & 0x3f; return pte; } |