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author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:09 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:09 +0200 |
commit | 7bcf7717b6a047c272410d0cd00213185fe6b99d (patch) | |
tree | 81c5d6bbc2130815713e22bb5408ea80b6e1c499 /include/asm-mips/qemu.h | |
parent | [MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers. (diff) | |
download | linux-7bcf7717b6a047c272410d0cd00213185fe6b99d.tar.xz linux-7bcf7717b6a047c272410d0cd00213185fe6b99d.zip |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/qemu.h')
-rw-r--r-- | include/asm-mips/qemu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-mips/qemu.h b/include/asm-mips/qemu.h index 531caf44560c..487ced4a40de 100644 --- a/include/asm-mips/qemu.h +++ b/include/asm-mips/qemu.h @@ -12,7 +12,7 @@ * Interrupt numbers */ #define Q_PIC_IRQ_BASE 0 -#define Q_COUNT_COMPARE_IRQ 16 +#define Q_COUNT_COMPARE_IRQ 23 /* * Qemu clock rate. Unlike on real MIPS this has no relation to the |