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author | David Woodhouse <dwmw2@infradead.org> | 2007-04-27 20:16:19 +0200 |
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committer | David Woodhouse <dwmw2@infradead.org> | 2007-04-27 20:16:19 +0200 |
commit | d1da4e50e5d09f02c340927a4fcb7f54202fa033 (patch) | |
tree | 7f98317bdd45dbdb7644e9179891c5af6a3a8ef1 /include/asm-mips/sibyte/bcm1480_regs.h | |
parent | [MTD] [NAND] Wrong calculation of page number in nand_block_bad() (diff) | |
parent | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmo... (diff) | |
download | linux-d1da4e50e5d09f02c340927a4fcb7f54202fa033.tar.xz linux-d1da4e50e5d09f02c340927a4fcb7f54202fa033.zip |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
drivers/mtd/Kconfig
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'include/asm-mips/sibyte/bcm1480_regs.h')
-rw-r--r-- | include/asm-mips/sibyte/bcm1480_regs.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/include/asm-mips/sibyte/bcm1480_regs.h b/include/asm-mips/sibyte/bcm1480_regs.h index c2dd2fe3047c..bda391d3af85 100644 --- a/include/asm-mips/sibyte/bcm1480_regs.h +++ b/include/asm-mips/sibyte/bcm1480_regs.h @@ -230,6 +230,7 @@ #define A_BCM1480_DUART_IMRREG(chan) (A_BCM1480_DUART(chan) + R_BCM1480_DUART_IMRREG(chan)) #define A_BCM1480_DUART_ISRREG(chan) (A_BCM1480_DUART(chan) + R_BCM1480_DUART_ISRREG(chan)) +#define A_BCM1480_DUART_IN_PORT(chan) (A_BCM1480_DUART(chan) + R_DUART_INP_ORT) /* * These constants are the absolute addresses. @@ -404,6 +405,21 @@ #define R_BCM1480_IMR_ALIAS_MAILBOX_0 0x0000 /* 0x0x0 */ #define R_BCM1480_IMR_ALIAS_MAILBOX_0_SET 0x0008 /* 0x0x8 */ +/* + * these macros work together to build the address of a mailbox + * register, e.g., A_BCM1480_MAILBOX_REGISTER(0,R_BCM1480_IMR_MAILBOX_SET,2) + * for mbox_0_set_cpu2 returns 0x00100240C8 + */ +#define R_BCM1480_IMR_MAILBOX_CPU 0x00 +#define R_BCM1480_IMR_MAILBOX_SET 0x08 +#define R_BCM1480_IMR_MAILBOX_CLR 0x10 +#define R_BCM1480_IMR_MAILBOX_NUM_SPACING 0x20 +#define A_BCM1480_MAILBOX_REGISTER(num,reg,cpu) \ + (A_BCM1480_IMR_CPU0_BASE + \ + (num * R_BCM1480_IMR_MAILBOX_NUM_SPACING) + \ + (cpu * BCM1480_IMR_REGISTER_SPACING) + \ + (R_BCM1480_IMR_MAILBOX_0_CPU + reg)) + /* ********************************************************************* * System Performance Counter Registers (Section 4.7) ********************************************************************* */ @@ -428,6 +444,10 @@ #define A_BCM1480_SCD_PERF_CNT_6 0x0010020500 #define A_BCM1480_SCD_PERF_CNT_7 0x0010020508 +#define BCM1480_SCD_NUM_PERF_CNT 8 +#define BCM1480_SCD_PERF_CNT_SPACING 8 +#define A_BCM1480_SCD_PERF_CNT(n) (A_SCD_PERF_CNT_0+(n*BCM1480_SCD_PERF_CNT_SPACING)) + /* ********************************************************************* * System Bus Watcher Registers (Section 4.8) ********************************************************************* */ |