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authorRalf Baechle <ralf@linux-mips.org>2008-04-28 18:14:26 +0200
committerRalf Baechle <ralf@linux-mips.org>2008-04-28 18:14:26 +0200
commit39b8d5254246ac56342b72f812255c8f7a74dca9 (patch)
treea9ec6bfb5d09a8367c34cc2067328d1b49bb46c1 /include/asm-mips/smtc.h
parent[MIPS] Add CoreFPGA5 support; distinguish between SOCit/ROCit (diff)
downloadlinux-39b8d5254246ac56342b72f812255c8f7a74dca9.tar.xz
linux-39b8d5254246ac56342b72f812255c8f7a74dca9.zip
[MIPS] Add support for MIPS CMP platform.
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/smtc.h')
-rw-r--r--include/asm-mips/smtc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h
index ff3e8936b493..3639b28f80db 100644
--- a/include/asm-mips/smtc.h
+++ b/include/asm-mips/smtc.h
@@ -44,6 +44,7 @@ extern int mipsmt_build_cpu_map(int startslot);
extern void mipsmt_prepare_cpus(void);
extern void smtc_smp_finish(void);
extern void smtc_boot_secondary(int cpu, struct task_struct *t);
+extern void smtc_cpus_done(void);
/*
* Sharing the TLB between multiple VPEs means that the