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| author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:05 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:05 +0200 |
| commit | cc6e8e0812cf95aea397c457ff48de2ac069614f (patch) | |
| tree | da0527908dceed57cd10204034a6b2c888a34863 /include/asm-mips/sn | |
| parent | [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. (diff) | |
| download | linux-cc6e8e0812cf95aea397c457ff48de2ac069614f.tar.xz linux-cc6e8e0812cf95aea397c457ff48de2ac069614f.zip | |
[MIPS] Remove IP27 specific structures from struct cpuinfo_mips
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/sn')
| -rw-r--r-- | include/asm-mips/sn/arch.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/sn/arch.h b/include/asm-mips/sn/arch.h index da523de628be..bd75945e10ff 100644 --- a/include/asm-mips/sn/arch.h +++ b/include/asm-mips/sn/arch.h @@ -19,8 +19,8 @@ typedef u64 hubreg_t; -#define cputonasid(cpu) (cpu_data[(cpu)].p_nasid) -#define cputoslice(cpu) (cpu_data[(cpu)].p_slice) +#define cputonasid(cpu) (sn_cpu_info[(cpu)].p_nasid) +#define cputoslice(cpu) (sn_cpu_info[(cpu)].p_slice) #define makespnum(_nasid, _slice) \ (((_nasid) << CPUS_PER_NODE_SHFT) | (_slice)) |