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authorRalf Baechle <ralf@linux-mips.org>2008-09-16 19:48:51 +0200
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 17:18:52 +0200
commit384740dc49ea651ba350704d13ff6be9976e37fe (patch)
treea6e80cad287ccae7a86d81bfa692fc96889c88ed /include/asm-mips/txx9tmr.h
parentMIPS: Alchemy: rename directory (diff)
downloadlinux-384740dc49ea651ba350704d13ff6be9976e37fe.tar.xz
linux-384740dc49ea651ba350704d13ff6be9976e37fe.zip
MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/txx9tmr.h')
-rw-r--r--include/asm-mips/txx9tmr.h67
1 files changed, 0 insertions, 67 deletions
diff --git a/include/asm-mips/txx9tmr.h b/include/asm-mips/txx9tmr.h
deleted file mode 100644
index 67f70a8f09bd..000000000000
--- a/include/asm-mips/txx9tmr.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * include/asm-mips/txx9tmr.h
- * TX39/TX49 timer controller definitions.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_TXX9TMR_H
-#define __ASM_TXX9TMR_H
-
-#include <linux/types.h>
-
-struct txx9_tmr_reg {
- u32 tcr;
- u32 tisr;
- u32 cpra;
- u32 cprb;
- u32 itmr;
- u32 unused0[3];
- u32 ccdr;
- u32 unused1[3];
- u32 pgmr;
- u32 unused2[3];
- u32 wtmr;
- u32 unused3[43];
- u32 trr;
-};
-
-/* TMTCR : Timer Control */
-#define TXx9_TMTCR_TCE 0x00000080
-#define TXx9_TMTCR_CCDE 0x00000040
-#define TXx9_TMTCR_CRE 0x00000020
-#define TXx9_TMTCR_ECES 0x00000008
-#define TXx9_TMTCR_CCS 0x00000004
-#define TXx9_TMTCR_TMODE_MASK 0x00000003
-#define TXx9_TMTCR_TMODE_ITVL 0x00000000
-#define TXx9_TMTCR_TMODE_PGEN 0x00000001
-#define TXx9_TMTCR_TMODE_WDOG 0x00000002
-
-/* TMTISR : Timer Int. Status */
-#define TXx9_TMTISR_TPIBS 0x00000004
-#define TXx9_TMTISR_TPIAS 0x00000002
-#define TXx9_TMTISR_TIIS 0x00000001
-
-/* TMITMR : Interval Timer Mode */
-#define TXx9_TMITMR_TIIE 0x00008000
-#define TXx9_TMITMR_TZCE 0x00000001
-
-/* TMWTMR : Watchdog Timer Mode */
-#define TXx9_TMWTMR_TWIE 0x00008000
-#define TXx9_TMWTMR_WDIS 0x00000080
-#define TXx9_TMWTMR_TWC 0x00000001
-
-void txx9_clocksource_init(unsigned long baseaddr,
- unsigned int imbusclk);
-void txx9_clockevent_init(unsigned long baseaddr, int irq,
- unsigned int imbusclk);
-void txx9_tmr_init(unsigned long baseaddr);
-
-#ifdef CONFIG_CPU_TX39XX
-#define TXX9_TIMER_BITS 24
-#else
-#define TXX9_TIMER_BITS 32
-#endif
-
-#endif /* __ASM_TXX9TMR_H */