diff options
author | Thiemo Seufer <ths@networkno.de> | 2005-04-25 18:36:23 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 20:31:11 +0200 |
commit | ba5187dbb4b2eac99d6fa1d6bbece67e0066bf51 (patch) | |
tree | 9a1fa0b0cb6ff1c64c20569c4e6ecdfd3f865bbc /include/asm-mips | |
parent | * use 'unsigned long' as address supplied to au_write[bwl]() (diff) | |
download | linux-ba5187dbb4b2eac99d6fa1d6bbece67e0066bf51.tar.xz linux-ba5187dbb4b2eac99d6fa1d6bbece67e0066bf51.zip |
Better interface to run uncached cache setup code.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r-- | include/asm-mips/cacheflush.h | 3 | ||||
-rw-r--r-- | include/asm-mips/mipsregs.h | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h index 4213d2c8bb8a..a18ba2edc0b6 100644 --- a/include/asm-mips/cacheflush.h +++ b/include/asm-mips/cacheflush.h @@ -90,4 +90,7 @@ extern void (*flush_data_cache_page)(unsigned long addr); #define ClearPageDcacheDirty(page) \ clear_bit(PG_dcache_dirty, &(page)->flags) +/* Run kernel code uncached, useful for cache probing functions. */ +unsigned long __init run_uncached(void *func); + #endif /* _ASM_CACHEFLUSH_H */ diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 006354ed2e29..f3b0b4181508 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -433,6 +433,9 @@ #define R5K_CONF_SE (_ULCAST_(1) << 12) #define R5K_CONF_SS (_ULCAST_(3) << 20) +/* Bits specific to the RM7000. */ +#define R7K_CONF_SE (_ULCAST_(1) << 3) + /* Bits specific to the R10000. */ #define R10K_CONF_DN (_ULCAST_(3) << 3) #define R10K_CONF_CT (_ULCAST_(1) << 5) |