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| author | Paul Mundt <lethal@linux-sh.org> | 2007-05-08 08:45:33 +0200 |
|---|---|---|
| committer | Paul Mundt <lethal@hera.kernel.org> | 2007-05-09 03:35:01 +0200 |
| commit | 074f98df0547b7d15f78db9a17e985da0c22af28 (patch) | |
| tree | e40128828e295cfabc6a18206df9a0c4ea25c654 /include/asm-sh/cpu-features.h | |
| parent | sh: Fix PC adjustments for varying opcode length. (diff) | |
| download | linux-074f98df0547b7d15f78db9a17e985da0c22af28.tar.xz linux-074f98df0547b7d15f78db9a17e985da0c22af28.zip | |
sh: Add 32-bit opcode feature CPU flag.
Add a CPU flag for the CPUs that support 32-bit opcodes, which
gets passed down to userspace.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/cpu-features.h')
| -rw-r--r-- | include/asm-sh/cpu-features.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h index 4bccd7c032f9..86308aa39731 100644 --- a/include/asm-sh/cpu-features.h +++ b/include/asm-sh/cpu-features.h @@ -20,5 +20,6 @@ #define CPU_HAS_PTEA 0x0020 /* PTEA register */ #define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ #define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ +#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */ #endif /* __ASM_SH_CPU_FEATURES_H */ |