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authorPaul Mundt <lethal@linux-sh.org>2007-12-10 07:50:28 +0100
committerPaul Mundt <lethal@linux-sh.org>2008-01-28 05:18:59 +0100
commitcd01204b82933754a7276838656420477f64d4b8 (patch)
treef9e3b11574bec04cda78c549cdc5c37c3c75c4a5 /include/asm-sh/system.h
parentsh: Support denormalization on SH-4 FPU. (diff)
downloadlinux-cd01204b82933754a7276838656420477f64d4b8.tar.xz
linux-cd01204b82933754a7276838656420477f64d4b8.zip
sh: Encode L1/L2 cache shape in auxvt.
This adds in the L1I/L1D/L2 cache shape support to their respective entries in the ELF auxvt, based on the Alpha implementation. We use this on the userspace libc side for calculating a tightly packed SHMLBA amongst other things. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/system.h')
-rw-r--r--include/asm-sh/system.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index 9bda8d063ecf..84592555ba2a 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -12,7 +12,7 @@
#include <asm/types.h>
#include <asm/ptrace.h>
-#define AT_VECTOR_SIZE_ARCH 1 /* entries in ARCH_DLINFO */
+#define AT_VECTOR_SIZE_ARCH 4 /* entries in ARCH_DLINFO */
#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
#define __icbi() \