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author | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 07:05:52 +0200 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 07:05:52 +0200 |
commit | fdfc74f9fcebdda14609159d5010b758a9409acf (patch) | |
tree | 191532cb703383768cc198a41503e412578921bb /include/asm-sh/system.h | |
parent | sh: RTS7751R2D board updates. (diff) | |
download | linux-fdfc74f9fcebdda14609159d5010b758a9409acf.tar.xz linux-fdfc74f9fcebdda14609159d5010b758a9409acf.zip |
sh: Support for SH-4A memory barriers.
SH-4A supports 'synco' as a barrier, sprinkle it around
the cache ops as necessary..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/system.h')
-rw-r--r-- | include/asm-sh/system.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index e89728d405d8..eb4902ed920a 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -84,10 +84,17 @@ static __inline__ unsigned long tas(volatile int *m) extern void __xchg_called_with_bad_pointer(void); +#ifdef CONFIG_CPU_SH4A +#define mb() __asm__ __volatile__ ("synco": : :"memory") +#define rmb() mb() +#define wmb() __asm__ __volatile__ ("synco": : :"memory") +#define read_barrier_depends() do { } while(0) +#else #define mb() __asm__ __volatile__ ("": : :"memory") #define rmb() mb() #define wmb() __asm__ __volatile__ ("": : :"memory") #define read_barrier_depends() do { } while(0) +#endif #ifdef CONFIG_SMP #define smp_mb() mb() |