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| author | David S. Miller <davem@davemloft.net> | 2005-08-29 21:46:22 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2005-08-29 21:46:22 +0200 |
| commit | 4f07118f656c179740cad35b827032e2e29b1210 (patch) | |
| tree | 7ddeb17346fe25ae75aa5373659c053afb9ef5f5 /include/asm-sparc64/bitops.h | |
| parent | [SPARC64]: Make debugging spinlocks usable again. (diff) | |
| download | linux-4f07118f656c179740cad35b827032e2e29b1210.tar.xz linux-4f07118f656c179740cad35b827032e2e29b1210.zip | |
[SPARC64]: More fully work around Spitfire Errata 51.
It appears that a memory barrier soon after a mispredicted
branch, not just in the delay slot, can cause the hang
condition of this cpu errata.
So move them out-of-line, and explicitly put them into
a "branch always, predict taken" delay slot which should
fully kill this problem.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/bitops.h')
| -rw-r--r-- | include/asm-sparc64/bitops.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-sparc64/bitops.h b/include/asm-sparc64/bitops.h index 9c5e71970287..6388b8376c50 100644 --- a/include/asm-sparc64/bitops.h +++ b/include/asm-sparc64/bitops.h @@ -72,8 +72,8 @@ static inline int __test_and_change_bit(int nr, volatile unsigned long *addr) } #ifdef CONFIG_SMP -#define smp_mb__before_clear_bit() membar("#StoreLoad | #LoadLoad") -#define smp_mb__after_clear_bit() membar("#StoreLoad | #StoreStore") +#define smp_mb__before_clear_bit() membar_storeload_loadload() +#define smp_mb__after_clear_bit() membar_storeload_storestore() #else #define smp_mb__before_clear_bit() barrier() #define smp_mb__after_clear_bit() barrier() |