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authorDavid S. Miller <davem@davemloft.net>2005-06-28 02:04:45 +0200
committerDavid S. Miller <davem@davemloft.net>2005-06-28 02:04:45 +0200
commit63b614522cba5a015923c0e8f284be6e01c13f1a (patch)
tree4f3724d90f52ef8b98f7c0b9716730b7adbd8566 /include/asm-sparc64/irq.h
parent[SPARC64]: Avoid membar instructions in delay slots. (diff)
downloadlinux-63b614522cba5a015923c0e8f284be6e01c13f1a.tar.xz
linux-63b614522cba5a015923c0e8f284be6e01c13f1a.zip
[SPARC64]: Get rid of fast IRQ feature.
The only real user was the assembler floppy interrupt handler, which does not need to be in assembly. This makes it so that there are less pieces of code which know about the internal layout of ivector_table[] and friends. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/irq.h')
-rw-r--r--include/asm-sparc64/irq.h7
1 files changed, 1 insertions, 6 deletions
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index 3aef0ca67750..018e2e46082b 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -19,7 +19,7 @@
/* You should not mess with this directly. That's the job of irq.c.
*
* If you make changes here, please update hand coded assembler of
- * SBUS/floppy interrupt handler in entry.S -DaveM
+ * the vectored interrupt trap handler in entry.S -DaveM
*
* This is currently one DCACHE line, two buckets per L2 cache
* line. Keep this in mind please.
@@ -122,11 +122,6 @@ extern void enable_irq(unsigned int);
extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap);
extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
-extern int request_fast_irq(unsigned int irq,
- irqreturn_t (*handler)(int, void *, struct pt_regs *),
- unsigned long flags, __const__ char *devname,
- void *dev_id);
-
static __inline__ void set_softint(unsigned long bits)
{
__asm__ __volatile__("wr %0, 0x0, %%set_softint"