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author | David S. Miller <davem@davemloft.net> | 2008-02-29 06:53:20 +0100 |
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committer | David S. Miller <davem@davemloft.net> | 2008-02-29 06:53:20 +0100 |
commit | 7729d74ed5099021f79ee8ecfa676829b5bac796 (patch) | |
tree | 969a2a5e2b0de1d812f8856e9f60fdf0c471a922 /include/asm-sparc64 | |
parent | [SPARC]: Mark linux_sparc_{fpu,chips} static. (diff) | |
download | linux-7729d74ed5099021f79ee8ecfa676829b5bac796.tar.xz linux-7729d74ed5099021f79ee8ecfa676829b5bac796.zip |
[SPARC]: Add reboot_command[] extern decl to asm/system.h
Kill off some sparse warnings.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64')
-rw-r--r-- | include/asm-sparc64/system.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index ed91a5d8d4f0..53eae091a171 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h @@ -30,6 +30,8 @@ enum sparc_cpu { #define ARCH_SUN4C_SUN4 0 #define ARCH_SUN4 0 +extern char reboot_command[]; + /* These are here in an effort to more fully work around Spitfire Errata * #51. Essentially, if a memory barrier occurs soon after a mispredicted * branch, the chip can stop executing instructions until a trap occurs. |