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authorYinghai Lu <yhlu.kernel@gmail.com>2008-07-12 03:41:54 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-12 08:45:12 +0200
commitc535b6a1a685eb23f96e2c221777d6c1e05080d5 (patch)
treeb21eda3f5693f680a2bed64e731013c011459246 /include/asm-x86/apic.h
parentx2apic: kernel-parameter documentation for "x2apic_phys" (diff)
downloadlinux-c535b6a1a685eb23f96e2c221777d6c1e05080d5.tar.xz
linux-c535b6a1a685eb23f96e2c221777d6c1e05080d5.zip
x86: let 32bit use apic_ops too
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/apic.h')
-rw-r--r--include/asm-x86/apic.h13
1 files changed, 2 insertions, 11 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index 129752dd2525..fcd2f01277b6 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -49,11 +49,6 @@ extern int disable_apic;
#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
#else
-#ifndef CONFIG_X86_64
-#define apic_write native_apic_mem_write
-#define apic_write_atomic native_apic_mem_write_atomic
-#define apic_read native_apic_mem_read
-#endif
#define setup_boot_clock setup_boot_APIC_clock
#define setup_secondary_clock setup_secondary_APIC_clock
#endif
@@ -95,16 +90,13 @@ static inline u32 native_apic_msr_read(u32 reg)
return low;
}
-#ifdef CONFIG_X86_32
-extern void apic_wait_icr_idle(void);
-extern u32 safe_apic_wait_icr_idle(void);
-extern void apic_icr_write(u32 low, u32 id);
-#else
+#ifndef CONFIG_X86_32
extern int x2apic, x2apic_preenabled;
extern void check_x2apic(void);
extern void enable_x2apic(void);
extern void enable_IR_x2apic(void);
extern void x2apic_icr_write(u32 low, u32 id);
+#endif
struct apic_ops {
u32 (*read)(u32 reg);
@@ -125,7 +117,6 @@ extern struct apic_ops *apic_ops;
#define apic_icr_write (apic_ops->icr_write)
#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
-#endif
extern int get_physical_broadcast(void);