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| author | Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:34:09 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:34:09 +0100 |
| commit | 4c61afcdb2cd4be299c1442b33adf312b695e2d7 (patch) | |
| tree | 8f51b96e2f6520c63b7c54dd84f4840ab9157590 /include/asm-x86/cacheflush.h | |
| parent | x86: optimize clflush (diff) | |
| download | linux-4c61afcdb2cd4be299c1442b33adf312b695e2d7.tar.xz linux-4c61afcdb2cd4be299c1442b33adf312b695e2d7.zip | |
x86: fix clflush_page_range logic
only present ptes must be flushed.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to '')
| -rw-r--r-- | include/asm-x86/cacheflush.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-x86/cacheflush.h b/include/asm-x86/cacheflush.h index 3e74aff90809..8dd8c5e3cc7f 100644 --- a/include/asm-x86/cacheflush.h +++ b/include/asm-x86/cacheflush.h @@ -42,7 +42,7 @@ int set_memory_ro(unsigned long addr, int numpages); int set_memory_rw(unsigned long addr, int numpages); int set_memory_np(unsigned long addr, int numpages); -void clflush_cache_range(void *addr, int size); +void clflush_cache_range(void *addr, unsigned int size); #ifdef CONFIG_DEBUG_RODATA void mark_rodata_ro(void); |