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| author | Thomas Gleixner <tglx@linutronix.de> | 2008-01-30 13:34:08 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:34:08 +0100 |
| commit | 3b233e52f70bf102078b2c0c3f7f86a441689056 (patch) | |
| tree | f9c65948016a3bffd3a3b0c8d327d28fc34a7ea8 /include/asm-x86/cacheflush.h | |
| parent | x86: clflush_page_range needs mfence (diff) | |
| download | linux-3b233e52f70bf102078b2c0c3f7f86a441689056.tar.xz linux-3b233e52f70bf102078b2c0c3f7f86a441689056.zip | |
x86: optimize clflush
clflush is sufficient to be issued on one CPU. The invalidation is
broadcast throughout the coherence domain.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/cacheflush.h')
0 files changed, 0 insertions, 0 deletions