diff options
| author | Jan Beulich <jbeulich@novell.com> | 2008-03-10 14:11:17 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-04-17 17:40:58 +0200 |
| commit | 5b0e508415a83989fe704b4718a1a214bc333ca7 (patch) | |
| tree | bf73f1e6b944c190441413cedfb49b05e04ffe6b /include/asm-x86/processor.h | |
| parent | x86: Don't send RESCHEDULE_VECTOR to offlined cpus (diff) | |
| download | linux-5b0e508415a83989fe704b4718a1a214bc333ca7.tar.xz linux-5b0e508415a83989fe704b4718a1a214bc333ca7.zip | |
x86: prevent unconditional writes to DebugCtl MSR
Otherwise, enabling (or better, subsequent disabling) of single
stepping would cause a kernel oops on CPUs not having this MSR.
The patch could have been added a conditional to the MSR write in
user_disable_single_step(), but centralizing the updates seems safer
and (looking forward) better manageable.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Markus Metzger <markus.t.metzger@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/processor.h')
| -rw-r--r-- | include/asm-x86/processor.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h index cc0268395ea2..40227c9bf51b 100644 --- a/include/asm-x86/processor.h +++ b/include/asm-x86/processor.h @@ -741,6 +741,15 @@ extern void switch_to_new_gdt(void); extern void cpu_init(void); extern void init_gdt(int cpu); +static inline void update_debugctlmsr(unsigned long debugctlmsr) +{ +#ifndef CONFIG_X86_DEBUGCTLMSR + if (boot_cpu_data.x86 < 6) + return; +#endif + wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr); +} + /* * from system description table in BIOS. Mostly for MCA use, but * others may find it useful: |