diff options
| author | Jerone Young <jyoung5@us.ibm.com> | 2007-11-20 00:06:32 +0100 |
|---|---|---|
| committer | Avi Kivity <avi@qumranet.com> | 2008-01-30 16:53:07 +0100 |
| commit | da1386a5bc43fa0faf17089a68c2991cf1d526c8 (patch) | |
| tree | f8b14c46567ce4dd81bdc513a0bb81422099fe03 /include/asm-x86 | |
| parent | KVM: Portability: Move kvm_memory_alias to asm/kvm.h (diff) | |
| download | linux-da1386a5bc43fa0faf17089a68c2991cf1d526c8.tar.xz linux-da1386a5bc43fa0faf17089a68c2991cf1d526c8.zip | |
KVM: Portability: Move x86 pic strutctures
This patch moves structures:
kvm_pic_state
kvm_ioapic_state
to inclue/asm-x86/kvm.h.
Signed-off-by: Jerone Young <jyoung5@us.ibm.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'include/asm-x86')
| -rw-r--r-- | include/asm-x86/kvm.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/include/asm-x86/kvm.h b/include/asm-x86/kvm.h index 37cf8e995c83..80752bccc756 100644 --- a/include/asm-x86/kvm.h +++ b/include/asm-x86/kvm.h @@ -17,4 +17,53 @@ struct kvm_memory_alias { __u64 target_phys_addr; }; +/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */ +struct kvm_pic_state { + __u8 last_irr; /* edge detection */ + __u8 irr; /* interrupt request register */ + __u8 imr; /* interrupt mask register */ + __u8 isr; /* interrupt service register */ + __u8 priority_add; /* highest irq priority */ + __u8 irq_base; + __u8 read_reg_select; + __u8 poll; + __u8 special_mask; + __u8 init_state; + __u8 auto_eoi; + __u8 rotate_on_auto_eoi; + __u8 special_fully_nested_mode; + __u8 init4; /* true if 4 byte init */ + __u8 elcr; /* PIIX edge/trigger selection */ + __u8 elcr_mask; +}; + +#define KVM_IOAPIC_NUM_PINS 24 +struct kvm_ioapic_state { + __u64 base_address; + __u32 ioregsel; + __u32 id; + __u32 irr; + __u32 pad; + union { + __u64 bits; + struct { + __u8 vector; + __u8 delivery_mode:3; + __u8 dest_mode:1; + __u8 delivery_status:1; + __u8 polarity:1; + __u8 remote_irr:1; + __u8 trig_mode:1; + __u8 mask:1; + __u8 reserve:7; + __u8 reserved[4]; + __u8 dest_id; + } fields; + } redirtbl[KVM_IOAPIC_NUM_PINS]; +}; + +#define KVM_IRQCHIP_PIC_MASTER 0 +#define KVM_IRQCHIP_PIC_SLAVE 1 +#define KVM_IRQCHIP_IOAPIC 2 + #endif |