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authorMuli Ben-Yehuda <muli@il.ibm.com>2007-07-21 17:10:55 +0200
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-22 03:37:11 +0200
commit8cb32dc748571fb474018172e6b59e5a06123192 (patch)
tree7b9352dd6fa3adc230e241b547f38f0fdac03966 /include/asm-x86_64
parentx86_64: implement CalIOC2 TCE cache flush sequence (diff)
downloadlinux-8cb32dc748571fb474018172e6b59e5a06123192.tar.xz
linux-8cb32dc748571fb474018172e6b59e5a06123192.zip
x86_64: make dump_error_regs a chip op
Provide seperate versions for Calgary and CalIOC2 Also print out the PCIe Root Complex Status on CalIOC2 errors Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-x86_64')
-rw-r--r--include/asm-x86_64/calgary.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86_64/calgary.h b/include/asm-x86_64/calgary.h
index 458ab19a70f0..67f60406e2d8 100644
--- a/include/asm-x86_64/calgary.h
+++ b/include/asm-x86_64/calgary.h
@@ -46,6 +46,7 @@ struct iommu_table {
struct cal_chipset_ops {
void (*handle_quirks)(struct iommu_table *tbl, struct pci_dev *dev);
void (*tce_cache_blast)(struct iommu_table *tbl);
+ void (*dump_error_regs)(struct iommu_table *tbl);
};
#define TCE_TABLE_SIZE_UNSPECIFIED ~0