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author | Ralf Baechle <ralf@linux-mips.org> | 2007-07-06 15:40:05 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-06 17:17:11 +0200 |
commit | fde97822a295da9dffa4af643b49a58ffc4516ad (patch) | |
tree | f9e10d270a8616ad092d9cdeddf20bb8e7c29b14 /include/asm-xtensa/errno.h | |
parent | [MIPS] RM7000: Enable ICACHE_REFILLS_WORKAROUND_WAR. (diff) | |
download | linux-fde97822a295da9dffa4af643b49a58ffc4516ad.tar.xz linux-fde97822a295da9dffa4af643b49a58ffc4516ad.zip |
[MIPS] Add macros to encode processor revisions.
Older processors used to encode processor version and revision in two
4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
have switched to use the 8-bits as 3:3:2 bitfield with the last field as
the patch number.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-xtensa/errno.h')
0 files changed, 0 insertions, 0 deletions