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author | Kishon Vijay Abraham I <kishon@ti.com> | 2019-12-16 10:57:00 +0100 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2020-01-08 08:28:06 +0100 |
commit | 372428db44cf8666ff07fa349d305c1be35cb7d4 (patch) | |
tree | 5dd99223b9e714201199c44ab29ce46f1b51b0c2 /include/crypto/sha1_base.h | |
parent | dt-bindings: phy: Sierra: Add bindings for Sierra in TI's J721E (diff) | |
download | linux-372428db44cf8666ff07fa349d305c1be35cb7d4.tar.xz linux-372428db44cf8666ff07fa349d305c1be35cb7d4.zip |
phy: cadence: Sierra: Make "phy_clk" and "sierra_apb" optional resources
Certain platforms like TI J721E using Cadence Sierra Serdes
doesn't provide explicit phy_clk and reset (APB reset) control.
Make them optional here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'include/crypto/sha1_base.h')
0 files changed, 0 insertions, 0 deletions