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authorLinus Walleij <linus.walleij@linaro.org>2018-10-23 09:24:22 +0200
committerLinus Walleij <linus.walleij@linaro.org>2018-10-24 16:26:35 +0200
commite982e3f02071473cd1211e26cbe74a56b5be0aa0 (patch)
tree8194fb21d45713281a7d86a6d29871413317d034 /include/drm/drm_mipi_dsi.h
parentdrm/doc: Update errno handbook (diff)
downloadlinux-e982e3f02071473cd1211e26cbe74a56b5be0aa0.tar.xz
linux-e982e3f02071473cd1211e26cbe74a56b5be0aa0.zip
drm: dsi: Add lane clock rate fields to DSI device
The DSI devices have a maximum operating frequency specified in their data sheet per the MIPI specification, and DSI hosts that can scale their frequency need this information to set their clock dividers right. As current panel drivers often lack this information, specify that setting it to zero will make the DSI host use some reasonable default. Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20181023072422.25754-1-linus.walleij@linaro.org
Diffstat (limited to 'include/drm/drm_mipi_dsi.h')
-rw-r--r--include/drm/drm_mipi_dsi.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 4fef19064b0f..491528f48cfb 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -168,6 +168,12 @@ struct mipi_dsi_device_info {
* @format: pixel format for video mode
* @lanes: number of active data lanes
* @mode_flags: DSI operation mode related flags
+ * @hs_rate: maximum lane frequency for high speed mode in hertz, this should
+ * be set to the real limits of the hardware, zero is only accepted for
+ * legacy drivers
+ * @lp_rate: maximum lane frequency for low power mode in hertz, this should
+ * be set to the real limits of the hardware, zero is only accepted for
+ * legacy drivers
*/
struct mipi_dsi_device {
struct mipi_dsi_host *host;
@@ -178,6 +184,8 @@ struct mipi_dsi_device {
unsigned int lanes;
enum mipi_dsi_pixel_format format;
unsigned long mode_flags;
+ unsigned long hs_rate;
+ unsigned long lp_rate;
};
#define MIPI_DSI_MODULE_PREFIX "mipi-dsi:"