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authorAlex Deucher <alexdeucher@gmail.com>2010-06-04 19:10:12 +0200
committerDave Airlie <airlied@redhat.com>2010-08-02 02:00:05 +0200
commite7aeeba6a8fb86ac52bcffa0b72942f784f2b37f (patch)
tree889d8196e31ec490beba8b801236d7734e8d36bb /include/drm/radeon_drm.h
parentdrm/radeon/kms: fix CS alignment checking for tiling (v2) (diff)
downloadlinux-e7aeeba6a8fb86ac52bcffa0b72942f784f2b37f.tar.xz
linux-e7aeeba6a8fb86ac52bcffa0b72942f784f2b37f.zip
drm/radeon/kms/r6xx+: add query for tile config (v2)
Userspace needs this information to access tiled buffers via the CPU. v2: rebased on evergreen accel changes Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to '')
-rw-r--r--include/drm/radeon_drm.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index 5347063e9d5a..ac5f0403d537 100644
--- a/include/drm/radeon_drm.h
+++ b/include/drm/radeon_drm.h
@@ -904,6 +904,7 @@ struct drm_radeon_cs {
#define RADEON_INFO_ACCEL_WORKING 0x03
#define RADEON_INFO_CRTC_FROM_ID 0x04
#define RADEON_INFO_ACCEL_WORKING2 0x05
+#define RADEON_INFO_TILING_CONFIG 0x06
struct drm_radeon_info {
uint32_t request;