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author | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-24 00:33:45 +0200 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-24 00:33:45 +0200 |
commit | cf657bb940b3106a52d329c039fb705fa8437724 (patch) | |
tree | c52e9cf9939f9563df01deec19ffd86deb3cc7ad /include/drm | |
parent | Merge tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kern... (diff) | |
parent | clk: rockchip: fix the rv1108 clk_mac sel register description (diff) | |
download | linux-cf657bb940b3106a52d329c039fb705fa8437724.tar.xz linux-cf657bb940b3106a52d329c039fb705fa8437724.zip |
Merge tag 'v4.14-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull Rockchip clk driver updates from Heiko Stuebner:
The biggest change is fixing the jitter on the fractional clock-type
Rockchip socs experience with the default approximation. For that we
introduce the ability to override it with a clock-specific approximation
and use that to create the needed rate settings as described in the
Rockchip soc manuals (same for all Rockchip socs).
Apart from that we have support for the rk3126 clock controller
which is similar to the rk3128 with some minimal differences
and a lot of improvements and fixes for the rv1108 clock controller
(missing clocks, some clock-ids, naming fixes, register fixes).
* tag 'v4.14-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: fix the rv1108 clk_mac sel register description
clk: rockchip: rename rv1108 macphy clock to mac
clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocks
clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id
clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID
clk: rockchip: add rk3228 sclk_sdio_src ID
clk: rockchip: add special approximation to fix up fractional clk's jitter
clk: fractional-divider: allow overriding of approximation
clk: rockchip: modify rk3128 clk driver to also support rk3126
dt-bindings: add documentation for rk3126 clock
clk: rockchip: add some critical clocks for rv1108 SoC
clk: rockchip: rename some of clks for rv1108 SoC
clk: rockchip: fix up some clks describe error for rv1108 SoC
clk: rockchip: support more clks for rv1108
clk: rockchip: fix up the pll clks error for rv1108 SoC
clk: rockchip: support more rates for rv1108 cpuclk
clk: rockchip: fix up indentation of some RV1108 clock-ids
clk: rockchip: rename the clk id for HCLK_I2S1_2CH
clk: rockchip: add more clk ids for rv1108
Diffstat (limited to '')
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