diff options
| author | Le Ma <le.ma@amd.com> | 2019-11-11 11:01:34 +0100 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-03-10 06:01:26 +0100 |
| commit | d46b417a918b66f17de85baf9ff033b1482fcc5e (patch) | |
| tree | 52cd9478c0a5b4c4d088eeac1bdd51b348982c3e /include/drm | |
| parent | drm/amdgpu: add vcn v2_6_0 ip headers (v3) (diff) | |
| download | linux-d46b417a918b66f17de85baf9ff033b1482fcc5e.tar.xz linux-d46b417a918b66f17de85baf9ff033b1482fcc5e.zip | |
drm/amdgpu: add aldebaran asic type
Add aldebaran in amdgpu_asic_name array and amdgpu_asic_type enum
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/amd_asic_type.h | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h index cde3c8c9f20c..336e36506910 100644 --- a/include/drm/amd_asic_type.h +++ b/include/drm/amd_asic_type.h @@ -51,13 +51,14 @@ enum amd_asic_type { CHIP_RAVEN, /* 22 */ CHIP_ARCTURUS, /* 23 */ CHIP_RENOIR, /* 24 */ - CHIP_NAVI10, /* 25 */ - CHIP_NAVI14, /* 26 */ - CHIP_NAVI12, /* 27 */ - CHIP_SIENNA_CICHLID, /* 28 */ - CHIP_NAVY_FLOUNDER, /* 29 */ - CHIP_VANGOGH, /* 30 */ - CHIP_DIMGREY_CAVEFISH, /* 31 */ + CHIP_ALDEBARAN, /* 25 */ + CHIP_NAVI10, /* 26 */ + CHIP_NAVI14, /* 27 */ + CHIP_NAVI12, /* 28 */ + CHIP_SIENNA_CICHLID, /* 29 */ + CHIP_NAVY_FLOUNDER, /* 30 */ + CHIP_VANGOGH, /* 31 */ + CHIP_DIMGREY_CAVEFISH, /* 32 */ CHIP_LAST, }; |