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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-04-09 17:19:04 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-12 19:50:07 +0200 |
| commit | 7d87a7f709650bde4d7d63117f25ee1c095da5dd (patch) | |
| tree | d621af7e54aa4e3fef7964b2ff7c1978e9146a3e /include/drm | |
| parent | drm/i915/chv: Initial clock gating support for Cherryview (diff) | |
| download | linux-7d87a7f709650bde4d7d63117f25ee1c095da5dd.tar.xz linux-7d87a7f709650bde4d7d63117f25ee1c095da5dd.zip | |
srm/i915/chv: Add Cherryview PCI IDs
v2: Update to also fill in the new num_pipes field.
v3: Rebase on top of the pciid extraction.
v4: Switch from info->has*ring to info->ring mask. Also add VEBOX support whiel
at it.
v5: s/CHV_PCI_IDS/CHV_IDS/, and drop the trailing '\'
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/i915_pciids.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 24f3cad045db..d18f31a77987 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -245,4 +245,10 @@ INTEL_BDW_GT12D_IDS(info), \ INTEL_BDW_GT3D_IDS(info) +#define INTEL_CHV_IDS(info) \ + INTEL_VGA_DEVICE(0x22b0, info), \ + INTEL_VGA_DEVICE(0x22b1, info), \ + INTEL_VGA_DEVICE(0x22b2, info), \ + INTEL_VGA_DEVICE(0x22b3, info) + #endif /* _I915_PCIIDS_H */ |