diff options
| author | Jiansong Chen <Jiansong.Chen@amd.com> | 2020-02-10 07:25:57 +0100 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-15 18:45:39 +0200 |
| commit | ddd8fbe77dadf6d889a7bbd0f82fc29093582d75 (patch) | |
| tree | 16ae81d8202a8c8f539af34ba2745ce8d95f74db /include/drm | |
| parent | drm/amdgpu: expand to add multiple trap event irq id (diff) | |
| download | linux-ddd8fbe77dadf6d889a7bbd0f82fc29093582d75.tar.xz linux-ddd8fbe77dadf6d889a7bbd0f82fc29093582d75.zip | |
drm/amdgpu: add navy_flounder asic type
Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/amd_asic_type.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h index 0c5bd1134460..8712e14991ed 100644 --- a/include/drm/amd_asic_type.h +++ b/include/drm/amd_asic_type.h @@ -55,6 +55,7 @@ enum amd_asic_type { CHIP_NAVI14, /* 26 */ CHIP_NAVI12, /* 27 */ CHIP_SIENNA_CICHLID, /* 28 */ + CHIP_NAVY_FLOUNDER, /* 29 */ CHIP_LAST, }; |