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| author | Andrew Bresticker <abrestic@chromium.org> | 2013-09-25 23:12:50 +0200 |
|---|---|---|
| committer | Tomasz Figa <t.figa@samsung.com> | 2014-01-08 18:02:42 +0100 |
| commit | c08ceea3a9d3276ec464e8b74573b1c58e93db7f (patch) | |
| tree | c6c1ed9938c8549cfe72ca4fc8f57273f81736ec /include/dt-bindings/clk | |
| parent | clk: exynos5250: add clock ID for div_pcm0 (diff) | |
| download | linux-c08ceea3a9d3276ec464e8b74573b1c58e93db7f.tar.xz linux-c08ceea3a9d3276ec464e8b74573b1c58e93db7f.zip | |
ARM: dts: exynos5250: add input clocks to audss clock controller
Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS
clock controller.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'include/dt-bindings/clk')
0 files changed, 0 insertions, 0 deletions