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author | Alim Akhtar <alim.akhtar@samsung.com> | 2015-09-10 10:44:27 +0200 |
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committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-09-15 11:02:29 +0200 |
commit | 2cbb51574557a8affe0732ad23a840cf90c656b1 (patch) | |
tree | c7691f5de7d6a330ede6be942af4a77ca1738b55 /include/dt-bindings/clock/exynos7-clk.h | |
parent | clk: samsung: exynos7: Change the CMU_TOPC block clock names (diff) | |
download | linux-2cbb51574557a8affe0732ad23a840cf90c656b1.tar.xz linux-2cbb51574557a8affe0732ad23a840cf90c656b1.zip |
clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPC
This adds some of the missing GATE clocks of CMU_TOPC block.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'include/dt-bindings/clock/exynos7-clk.h')
-rw-r--r-- | include/dt-bindings/clock/exynos7-clk.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/exynos7-clk.h b/include/dt-bindings/clock/exynos7-clk.h index e33c75a3c09d..d26fe0f3d5db 100644 --- a/include/dt-bindings/clock/exynos7-clk.h +++ b/include/dt-bindings/clock/exynos7-clk.h @@ -21,7 +21,18 @@ #define ACLK_MSCL_532 8 #define DOUT_SCLK_AUD_PLL 9 #define FOUT_AUD_PLL 10 -#define TOPC_NR_CLK 11 +#define SCLK_AUD_PLL 11 +#define SCLK_MFC_PLL_B 12 +#define SCLK_MFC_PLL_A 13 +#define SCLK_BUS1_PLL_B 14 +#define SCLK_BUS1_PLL_A 15 +#define SCLK_BUS0_PLL_B 16 +#define SCLK_BUS0_PLL_A 17 +#define SCLK_CC_PLL_B 18 +#define SCLK_CC_PLL_A 19 +#define ACLK_CCORE_133 20 +#define ACLK_PERIS_66 21 +#define TOPC_NR_CLK 22 /* TOP0 */ #define DOUT_ACLK_PERIC1 1 |