diff options
| author | Tomasz Figa <t.figa@samsung.com> | 2014-07-02 19:28:27 +0200 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-07-18 21:25:08 +0200 |
| commit | 9978f28f695adb63fa1726744a7f95e12920e8c9 (patch) | |
| tree | b235bb8bc00105038d8b15dfca69d076586279cd /include/dt-bindings/clock/s5pv210-audss.h | |
| parent | ARM: SAMSUNG: Remove legacy clock code (diff) | |
| download | linux-9978f28f695adb63fa1726744a7f95e12920e8c9.tar.xz linux-9978f28f695adb63fa1726744a7f95e12920e8c9.zip | |
clk: samsung: Add S5PV210 Audio Subsystem clock driver
This patch adds a driver for clock controller being a part of Audio
Subsystem present on S5PV210 and compatible SoCs. It is used to provide
clocks for other IP blocks of this subsystem.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'include/dt-bindings/clock/s5pv210-audss.h')
| -rw-r--r-- | include/dt-bindings/clock/s5pv210-audss.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/s5pv210-audss.h b/include/dt-bindings/clock/s5pv210-audss.h new file mode 100644 index 000000000000..fe57406e24de --- /dev/null +++ b/include/dt-bindings/clock/s5pv210-audss.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2014 Tomasz Figa <tomasz.figa@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This header provides constants for Samsung audio subsystem + * clock controller. + * + * The constants defined in this header are being used in dts + * and s5pv210 audss driver. + */ + +#ifndef _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H +#define _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H + +#define CLK_MOUT_AUDSS 0 +#define CLK_MOUT_I2S_A 1 + +#define CLK_DOUT_AUD_BUS 2 +#define CLK_DOUT_I2S_A 3 + +#define CLK_I2S 4 +#define CLK_HCLK_I2S 5 +#define CLK_HCLK_UART 6 +#define CLK_HCLK_HWA 7 +#define CLK_HCLK_DMA 8 +#define CLK_HCLK_BUF 9 +#define CLK_HCLK_RP 10 + +#define AUDSS_MAX_CLKS 11 + +#endif |