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authorThierry Reding <treding@nvidia.com>2016-06-09 17:47:17 +0200
committerThierry Reding <treding@nvidia.com>2016-06-17 17:24:10 +0200
commite452b818db48dc2c7edb5afd62de47ae0363aec2 (patch)
treec0b0f7faa967e9c693f06e0506ca54d97c54aaa0 /include/dt-bindings/clock/tegra210-car.h
parentclk: tegra: Squash sor1 safe/brick/src into a single mux (diff)
downloadlinux-e452b818db48dc2c7edb5afd62de47ae0363aec2.tar.xz
linux-e452b818db48dc2c7edb5afd62de47ae0363aec2.zip
clk: tegra: Enable sor1 and sor1_src on Tegra210
Make the sor1 and sor1_src clocks available on Tegra210. They will be used by the display driver to support HDMI and DP. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/dt-bindings/clock/tegra210-car.h')
-rw-r--r--include/dt-bindings/clock/tegra210-car.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h
index bd3530e56d46..35288b20f2c9 100644
--- a/include/dt-bindings/clock/tegra210-car.h
+++ b/include/dt-bindings/clock/tegra210-car.h
@@ -308,7 +308,7 @@
#define TEGRA210_CLK_CLK_OUT_3 279
#define TEGRA210_CLK_BLINK 280
/* 281 */
-/* 282 */
+#define TEGRA210_CLK_SOR1_SRC 282
/* 283 */
#define TEGRA210_CLK_XUSB_HOST_SRC 284
#define TEGRA210_CLK_XUSB_FALCON_SRC 285