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authorLiu Ying <Ying.Liu@freescale.com>2015-02-12 07:01:26 +0100
committerShawn Guo <shawn.guo@linaro.org>2015-03-02 13:52:03 +0100
commit8f21d8d42802a68daef5a34daca8b61df96ff8c6 (patch)
tree5d62d42e45cce7d74f75dc84c507b1ad8200da38 /include/dt-bindings/clock
parentARM: imx6q: Add GPR3 MIPI muxing control register field shift bits definition (diff)
downloadlinux-8f21d8d42802a68daef5a34daca8b61df96ff8c6.tar.xz
linux-8f21d8d42802a68daef5a34daca8b61df96ff8c6.zip
ARM: imx6q: clk: Add the video_27m clock
This patch supports the video_27m clock which is a fixed factor clock of the pll3_pfd1_540m clock. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/imx6qdl-clock.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index b690cdba163b..25625bf3927b 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -248,6 +248,7 @@
#define IMX6QDL_PLL6_BYPASS 235
#define IMX6QDL_PLL7_BYPASS 236
#define IMX6QDL_CLK_GPT_3M 237
-#define IMX6QDL_CLK_END 238
+#define IMX6QDL_CLK_VIDEO_27M 238
+#define IMX6QDL_CLK_END 239
#endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */