summaryrefslogtreecommitdiffstats
path: root/include/dt-bindings/clock
diff options
context:
space:
mode:
authorJun Nie <jun.nie@linaro.org>2015-07-23 09:02:52 +0200
committerStephen Boyd <sboyd@codeaurora.org>2015-07-28 20:59:37 +0200
commit105644e59a2b1c43fe2eeba6595d142c390552c2 (patch)
tree2cb41bb2013f727af02066b3c2b3edee1aecafb6 /include/dt-bindings/clock
parentclk: zx: Add audio div clock method for zx296702 (diff)
downloadlinux-105644e59a2b1c43fe2eeba6595d142c390552c2.tar.xz
linux-105644e59a2b1c43fe2eeba6595d142c390552c2.zip
clk: zx: Add audio and GPIO clock for zx296702
Add SPDIF/I2S and GPIO clock for zx296702 Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/zx296702-clock.h17
1 files changed, 15 insertions, 2 deletions
diff --git a/include/dt-bindings/clock/zx296702-clock.h b/include/dt-bindings/clock/zx296702-clock.h
index e683dbb7e7c5..26ee564b0e68 100644
--- a/include/dt-bindings/clock/zx296702-clock.h
+++ b/include/dt-bindings/clock/zx296702-clock.h
@@ -153,7 +153,16 @@
#define ZX296702_I2S0_WCLK 9
#define ZX296702_I2S0_PCLK 10
#define ZX296702_I2S0_DIV 11
-#define ZX296702_LSP0CLK_END 12
+#define ZX296702_I2S1_WCLK_MUX 12
+#define ZX296702_I2S1_WCLK 13
+#define ZX296702_I2S1_PCLK 14
+#define ZX296702_I2S1_DIV 15
+#define ZX296702_I2S2_WCLK_MUX 16
+#define ZX296702_I2S2_WCLK 17
+#define ZX296702_I2S2_PCLK 18
+#define ZX296702_I2S2_DIV 19
+#define ZX296702_GPIO_CLK 20
+#define ZX296702_LSP0CLK_END 21
#define ZX296702_UART0_WCLK_MUX 0
#define ZX296702_UART0_WCLK 1
@@ -165,6 +174,10 @@
#define ZX296702_SDMMC0_WCLK_DIV 7
#define ZX296702_SDMMC0_WCLK 8
#define ZX296702_SDMMC0_PCLK 9
-#define ZX296702_LSP1CLK_END 10
+#define ZX296702_SPDIF1_WCLK_MUX 10
+#define ZX296702_SPDIF1_WCLK 11
+#define ZX296702_SPDIF1_PCLK 12
+#define ZX296702_SPDIF1_DIV 13
+#define ZX296702_LSP1CLK_END 14
#endif /* __DT_BINDINGS_CLOCK_ZX296702_H */