Merge tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.3-rc1

This contains the bulk of the Tegra changes this cycle. It has a bunch
of improvements across almost all boards. These are mostly small and not
too exciting additions.

Most notably perhaps is the continuation of Jetson Nano support, which
is now mostly on feature parity with Jetson TX1.

* tag 'tegra-for-5.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (28 commits)
  arm64: tegra: Enable PCIe slots in P2972-0000 board
  arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT
  arm64: tegra: Add PEX DPD states as pinctrl properties
  arm64: tegra: Enable ACONNECT, ADMA and AGIC
  arm64: tegra: Add ACONNECT, ADMA and AGIC nodes
  arm64: tegra: Sort device tree nodes alphabetically
  arm64: tegra: Fix Jetson Nano GPU regulator
  arm64: tegra: Update Jetson TX1 GPU regulator timings
  arm64: tegra: Fix AGIC register range
  arm64: tegra: Add INA3221 channel info for Jetson TX2
  arm64: tegra: Enable PWM on Jetson Nano
  arm64: tegra: Enable CPU sleep on Jetson Nano
  arm64: tegra: Add ID EEPROMs on Jetson Nano
  arm64: tegra: Add ID EEPROM for Jetson TX2 Developer Kit
  arm64: tegra: Add ID EEPROM for Jetson TX2 module
  arm64: tegra: Add ID EEPROM for Jetson TX1 Developer Kit
  arm64: tegra: Add ID EEPROM for Jetson TX1 module
  arm64: tegra: Don't use architected timer for suspend on Tegra210
  arm64: tegra: Mark architected timer as always on
  arm64: tegra: Add pin control states for I2C on Tegra186
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 0 insertions, 41 deletions

diff --git a/include/dt-bindings/gpio/tegra186-gpio.h b/include/dt-bindings/gpio/tegra186-gpio.h
index cabc5712e745..0782b05e2775 100644
--- a/include/dt-bindings/gpio/tegra186-gpio.h
+++ b/include/dt-bindings/gpio/tegra186-gpio.h
@@ -41,34 +41,6 @@
 #define TEGRA186_MAIN_GPIO(port, offset) \
 	((TEGRA186_MAIN_GPIO_PORT_##port * 8) + offset)
 
-/* need to keep these for backwards-compatibility */
-#define TEGRA_MAIN_GPIO_PORT_A 0
-#define TEGRA_MAIN_GPIO_PORT_B 1
-#define TEGRA_MAIN_GPIO_PORT_C 2
-#define TEGRA_MAIN_GPIO_PORT_D 3
-#define TEGRA_MAIN_GPIO_PORT_E 4
-#define TEGRA_MAIN_GPIO_PORT_F 5
-#define TEGRA_MAIN_GPIO_PORT_G 6
-#define TEGRA_MAIN_GPIO_PORT_H 7
-#define TEGRA_MAIN_GPIO_PORT_I 8
-#define TEGRA_MAIN_GPIO_PORT_J 9
-#define TEGRA_MAIN_GPIO_PORT_K 10
-#define TEGRA_MAIN_GPIO_PORT_L 11
-#define TEGRA_MAIN_GPIO_PORT_M 12
-#define TEGRA_MAIN_GPIO_PORT_N 13
-#define TEGRA_MAIN_GPIO_PORT_O 14
-#define TEGRA_MAIN_GPIO_PORT_P 15
-#define TEGRA_MAIN_GPIO_PORT_Q 16
-#define TEGRA_MAIN_GPIO_PORT_R 17
-#define TEGRA_MAIN_GPIO_PORT_T 18
-#define TEGRA_MAIN_GPIO_PORT_X 19
-#define TEGRA_MAIN_GPIO_PORT_Y 20
-#define TEGRA_MAIN_GPIO_PORT_BB 21
-#define TEGRA_MAIN_GPIO_PORT_CC 22
-
-#define TEGRA_MAIN_GPIO(port, offset) \
-	((TEGRA_MAIN_GPIO_PORT_##port * 8) + offset)
-
 /* GPIOs implemented by AON GPIO controller */
 #define TEGRA186_AON_GPIO_PORT_S 0
 #define TEGRA186_AON_GPIO_PORT_U 1
@@ -82,17 +54,4 @@
 #define TEGRA186_AON_GPIO(port, offset) \
 	((TEGRA186_AON_GPIO_PORT_##port * 8) + offset)
 
-/* need to keep these for backwards-compatibility */
-#define TEGRA_AON_GPIO_PORT_S 0
-#define TEGRA_AON_GPIO_PORT_U 1
-#define TEGRA_AON_GPIO_PORT_V 2
-#define TEGRA_AON_GPIO_PORT_W 3
-#define TEGRA_AON_GPIO_PORT_Z 4
-#define TEGRA_AON_GPIO_PORT_AA 5
-#define TEGRA_AON_GPIO_PORT_EE 6
-#define TEGRA_AON_GPIO_PORT_FF 7
-
-#define TEGRA_AON_GPIO(port, offset) \
-	((TEGRA_AON_GPIO_PORT_##port * 8) + offset)
-
 #endif